The invention relates to the field of lattice-mismatched epitaxy, and in particular to the field of creating lattice-mismatched devices based on relaxed InGaAs alloys on Si substrates.
Most electronic and optoelectronic devices that require layers deposited by epitaxial growth utilize lattice-matched epitaxial layers, i.e. the crystal structure of the layer has the same lattice constant as that of the substrate. This lattice-matching criterion has been important in creating high quality materials and devices, since lattice-mismatch will create stress and in turn introduce dislocations and other defects into the layers. The dislocations and other defects will often degrade device performance, and more importantly, reduce the reliability of the device.
The applications of lattice-mismatched layers are numerous. In the InGaAs material system, one important composition is in the range of 20-60% In. These compositions allows the fabrication of 1.3 and 1.55 xcexcm optical devices as well as high electron mobility transistors with superior performance on GaAs-based epitaxial layers integrated on Si substrates. Alloys in the desired composition range are lattice-mismatched to GaAs, and thus usually suffer from high dislocation densities. One known method to minimize the number of dislocations reaching the surface of a relaxed, mismatched layer is to compositionally grade the material (in this case through grading the In composition) so that the lattice-mismatch is extended over a great thickness. In addition to the requirement that such layers be low in defect density, the final surface must be smooth with respect to standard optical lithography techniques and the total layer structure InGaAs epitaxial films/GaAs epitaxial films/Si substrate must be able to accommodate thermal expansion mismatch.
Compositional grading is typically accomplished in InGaAs alloys by grading the In composition at a low growth temperature, typically less than 500xc2x0 C. The dominant technique for depositing relaxed InGaAs layers is molecular beam epitaxy (MBE). MBE has a limited growth rate; therefore, the growth of these relaxed buffers is tedious and costly. In addition, the initial substrate is typically bulk GaAs, not a GaAs epitaxial film of high material quality on Si, and the surface of the InGaAs film is generally not smooth enough for high density optical lithography. A supply of virtual InGaAs substrates (a Si substrate with a high quality, relaxed InGaAs layer at the surface) with a low surface roughness would be in demand commercially. The user could buy the substrate and deposit the device layers without having to deposit the graded InGaAs layer and without introducing the crosshatched surface, which is a signature of compositionally graded films. To create a supply of these wafers at low cost, metalorganic chemical vapor deposition (MOCVD) offers greater potential. In conjunction with MOCVD, a planarization step after the epitaxial process enables InGaAs-on-Si virtual substrates of unprecedented quality.
There have been no successful reports of high quality relaxed graded InGaAs layers grown by MOCVD on GaAs-based epitaxial films on Si substrates. There are fundamental materials problems with InGaAs graded layers grown in a certain temperature window and the provision of a high quality GaAs film on Si has its own inherent challenges.
It is an object of the invention that with the appropriate grading rate, there is an unforeseen high temperature window, which can be accessed with MOCVD and not MBE, in which high quality relaxed InGaAs alloys can be grown on a GaAs-based epitaxial film on a Si substrate. Relaxed InGaAs grown with MOCVD in this temperature range has the economic advantages of the MOCVD technique, as well as the low defect densities and relaxation associated with high temperature growth. A subsequent planarization step makes the virtual InGaAs-on-Si substrates more suitable for high volume manufacturing.
Another object of the invention is to allow the fabrication of relaxed high quality InGaAs alloys on a Si substrate with the MOCVD technique. These virtual InGaAs substrates can be used in a variety of applications, in particular 1.3 and 1.55 xcexcm optical devices and high-speed microwave transistors. It is a further object of the invention to provide the appropriate conditions during growth in which it is possible to achieve high quality material and devices using this InGaAs/GaAs.
InxGal-xAs structures with compositionally graded buffers grown with MOCVD on GaAs substrates and characterized with plan-view and cross-sectional transmission electron microscopy (PV-TEM and X-TEM), atomic force microscopy (AFM), and x-ray diffraction (XRD) show that surface roughness experiences a maximum at growth temperatures near 550xc2x0 C. The strain fields from misfit dislocations induce a deleterious defect structure in the  less than 110 greater than  directions. At growth temperatures above and below this temperature, the surface roughness is decreased significantly; however, only growth temperatures above this regime ensure graded buffer relaxation, uniform composition caps, and high quality material. Using an optimum growth temperature of 700xc2x0 C. for InxGal-xAs grading, it is possible to produce In0.33Ga0.67As diodes on GaAs with threading dislocation densities  less than 8.5xc3x97106/cm2. Although previous experiments have not been carried out on GaAs films on Si substrates, the techniques can be transferred with modifications to address thermal mismatch constraints.
Accordingly, the invention provides a method of processing semiconductor materials, including providing a virtual substrate of a GaAs epitaxial film on a Si substrate; and epitaxially growing a relaxed graded layer of InxGa1-xAs at a temperature ranging upwards from about 600xc2x0 C. with a subsequent process for planarization of the InGaAs alloy.
The invention also provides a semiconductor structure including a substrate of a GaAs epitaxial film on a Si, and a relaxed graded layer of InxGal-xAs that is epitaxially grown at a temperature ranging upwards from about 600xc2x0 C.
These and other objects, features and advantages of the present invention will become apparent in light of the following detailed description of preferred embodiments thereof, as illustrated in the accompanying drawings.